wyvernSemi / pcievhost

PCIe (1.0a to 2.0) Virtual Root Complex model for Verilog, with Endpoint capabilities

Date Created 2016-10-07 (8 years ago)

Commits 66 (last one a day ago)

Stargazers 87 (0 this week)

Watchers 12 (0 this week)

Forks 21

License gpl-3.0

Ranking

RepositoryStats indexes 595,856 repositories, of these wyvernSemi/pcievhost is ranked #323,249 (46th percentile) for total stargazers, and #178,842 for total watchers. Github reports the primary language for this repository as C, for repositories using this language it is ranked #13,084/22,194.

wyvernSemi/pcievhost is also tagged with popular topics, for these it's ranked: c (#1,860/2763), verilog (#177/289)

Other Information

Homepage URL: http://www.anita-simulators.org.uk/wyvernsemi

All Topics

c bfm pli pcie cosim verilog virtual modelling verification

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

46 commits on the default branch (master) since jan '22

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Languages

The primary language is C but there's also others...

updated: 2024-12-21 @ 03:42pm, id: 70256088 / R_kgDOBDAF2A