AngeloJacobo / FPGA_RealTime_and_Static_Sobel_Edge_Detection

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

Date Created 2021-08-23 (2 years ago)

Commits 37 (last one 2 years ago)

Stargazers 37 (0 this week)

Watchers 2 (0 this week)

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RepositoryStats indexes 536,158 repositories, of these AngeloJacobo/FPGA_RealTime_and_Static_Sobel_Edge_Detection is ranked #490,404 (9th percentile) for total stargazers, and #449,383 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #422/461.

AngeloJacobo/FPGA_RealTime_and_Static_Sobel_Edge_Detection is also tagged with popular topics, for these it's ranked: real-time (#484/515), fpga (#418/435), verilog (#245/257)

Other Information

AngeloJacobo/FPGA_RealTime_and_Static_Sobel_Edge_Detection has Github issues enabled, there is 1 open issue and 1 closed issue.

All Topics

fpga ov7670 static verilog pipelined real-time sobel-edge-detector

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AngeloJacobo/FPGA_RealTime_and_Static_Sobel_Edge_Detection

updated: 2024-06-21 @ 11:59am, id: 398959900 / R_kgDOF8elHA