AngeloJacobo / FPGA_RealTime_and_Static_Sobel_Edge_Detection

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

Date Created 2021-08-23 (3 years ago)

Commits 37 (last one 3 years ago)

Stargazers 42 (0 this week)

Watchers 2 (0 this week)

Forks 4

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RepositoryStats indexes 597,824 repositories, of these AngeloJacobo/FPGA_RealTime_and_Static_Sobel_Edge_Detection is ranked #511,621 (14th percentile) for total stargazers, and #486,421 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #470/565.

AngeloJacobo/FPGA_RealTime_and_Static_Sobel_Edge_Detection is also tagged with popular topics, for these it's ranked: real-time (#519/583), fpga (#442/489), verilog (#262/292)

Other Information

AngeloJacobo/FPGA_RealTime_and_Static_Sobel_Edge_Detection has Github issues enabled, there is 1 open issue and 1 closed issue.

All Topics

fpga ov7670 static verilog pipelined real-time sobel-edge-detector

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AngeloJacobo/FPGA_RealTime_and_Static_Sobel_Edge_Detection

updated: 2024-12-20 @ 08:00pm, id: 398959900 / R_kgDOF8elHA