davidthings / spokefpga

FPGA Tools and Library

Date Created 2019-06-07 (5 years ago)
Commits 56 (last one 2 years ago)
Stargazers 46 (0 this week)
Watchers 6 (0 this week)
Forks 2
License apache-2.0
Ranking

RepositoryStats indexes 618,350 repositories, of these davidthings/spokefpga is ranked #504,760 (18th percentile) for total stargazers, and #303,826 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #463/601.

davidthings/spokefpga is also tagged with popular topics, for these it's ranked: library (#2,161/2442),  fpga (#437/503),  pipeline (#387/450),  verilog (#258/299)

Other Information

davidthings/spokefpga has 7 open pull requests on Github, 3 pull requests have been merged over the lifetime of the repository.

Homepage URL: https://davidthings.github.io/spokefpga

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

1 commits on the default branch (master) since jan '22

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Yearly Commits

Commits to the default branch (master) per year

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Issue History

Total Issues
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Closed Issues
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Languages

The primary language is Verilog but there's also others...

VerilogVerilogMakefileMakefileTclTclSystemVerilogSystemVerilogShellShellPythonPythonAssemblyAssemblyCC

updated: 2025-02-14 @ 08:13am, id: 190755935 / R_kgDOC160Xw