hrvach / fpg1

FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and Console.

Date Created 2018-12-13 (5 years ago)

Commits 16 (last one about a year ago)

Stargazers 187 (0 this week)

Watchers 12 (0 this week)

Forks 15

License mit

Ranking

RepositoryStats indexes 534,880 repositories, of these hrvach/fpg1 is ranked #176,628 (67th percentile) for total stargazers, and #172,456 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #106/459.

hrvach/fpg1 is also tagged with popular topics, for these it's ranked: emulator (#272/598), fpga (#142/435), verilog (#92/257), retrocomputing (#43/122)

All Topics

fpga pdp-1 mister verilog emulator misterfpga retrocomputing

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

7 commits on the default branch (master) since jan '22

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Issue History

Languages

The primary language is Verilog but there's also others...

Opengraph Image

updated: 2024-06-28 @ 10:24pm, id: 161706166 / R_kgDOCaNwtg