hrvach / fpg1

FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and Console.

Date Created 2018-12-13 (6 years ago)

Commits 16 (last one 2 years ago)

Stargazers 189 (0 this week)

Watchers 12 (0 this week)

Forks 16

License mit

Ranking

RepositoryStats indexes 595,856 repositories, of these hrvach/fpg1 is ranked #188,570 (68th percentile) for total stargazers, and #178,842 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #121/563.

hrvach/fpg1 is also tagged with popular topics, for these it's ranked: emulator (#284/642), fpga (#159/488), verilog (#102/289), retrocomputing (#45/139)

All Topics

fpga pdp-1 mister verilog emulator misterfpga retrocomputing

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

7 commits on the default branch (master) since jan '22

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Issue History

Languages

The primary language is Verilog but there's also others...

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updated: 2024-11-05 @ 06:58am, id: 161706166 / R_kgDOCaNwtg