jamieiles / 80x86

80186 compatible SystemVerilog CPU core and FPGA reference design

Date Created 2017-07-24 (7 years ago)

Commits 1,235 (last one 9 months ago)

Stargazers 383 (1 this week)

Watchers 26 (0 this week)

Forks 51

License gpl-3.0

Ranking

RepositoryStats indexes 595,856 repositories, of these jamieiles/80x86 is ranked #111,706 (81st percentile) for total stargazers, and #85,080 for total watchers. Github reports the primary language for this repository as C++, for repositories using this language it is ranked #6,226/31,836.

jamieiles/80x86 is also tagged with popular topics, for these it's ranked: fpga (#87/488), x86 (#86/282)

Other Information

jamieiles/80x86 has Github issues enabled, there are 8 open issues and 2 closed issues.

Homepage URL: https://www.jamieiles.com/80186/

All Topics

x86 fpga 80186 softcore systemverilog

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Recent Commit History

2 commits on the default branch (master) since jan '22

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Languages

The primary language is C++ but there's also others...

updated: 2024-12-20 @ 07:42am, id: 98195468 / R_kgDOBdpYDA