LeiWang1999 / ZYNQ-NVDLA

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

Date Created 2021-04-23 (3 years ago)

Commits 86 (last one 2 years ago)

Stargazers 310 (0 this week)

Watchers 8 (0 this week)

Forks 64

License unknown

Ranking

RepositoryStats indexes 595,856 repositories, of these LeiWang1999/ZYNQ-NVDLA is ranked #131,472 (78th percentile) for total stargazers, and #246,776 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #73/563.

LeiWang1999/ZYNQ-NVDLA is also tagged with popular topics, for these it's ranked: fpga (#106/488), verilog (#72/289)

Other Information

LeiWang1999/ZYNQ-NVDLA has Github issues enabled, there are 4 open issues and 24 closed issues.

There have been 1 release, the latest one was published on 2023-12-27 (12 months ago) with the name ZYNQ-NVDLA First Release.

All Topics

fpga zynq nvdla verilog yolox-nano

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

2 commits on the default branch (master) since jan '22

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Issue History

Languages

The primary language is Verilog but there's also others...

updated: 2024-12-19 @ 12:01am, id: 360813256 / R_kgDOFYGSyA