mikeroyal / CPLD-Guide

Complex Programmable Logic Device (CPLD) Guide

Date Created 2021-11-08 (2 years ago)

Commits 7 (last one 2 years ago)

Stargazers 35 (0 this week)

Watchers 5 (0 this week)

Forks 2

License unknown

Ranking

RepositoryStats indexes 579,555 repositories, of these mikeroyal/CPLD-Guide is ranked #533,128 (8th percentile) for total stargazers, and #331,043 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #484/533.

mikeroyal/CPLD-Guide is also tagged with popular topics, for these it's ranked: awesome (#2,701/2808), awesome-list (#2,693/2799), fpga (#452/475), resources (#442/464), hardware (#420/442), verilog (#266/280)

All Topics

cpld fpga awesome verilog circuits hardware resources logicgates awesome-list logic-circuit awesome-resource hardware-designs awesome-resources integrated-circuits

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Recent Commit History

1 commits on the default branch (main) since jan '22

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Languages

The only known language in this repository is Verilog

updated: 2024-10-28 @ 08:39am, id: 426018727 / R_kgDOGWSHpw