mikeroyal / CPLD-Guide

Complex Programmable Logic Device (CPLD) Guide

Date Created 2021-11-08 (3 years ago)

Commits 7 (last one 3 years ago)

Stargazers 44 (0 this week)

Watchers 4 (0 this week)

Forks 3

License unknown

Ranking

RepositoryStats indexes 627,578 repositories, of these mikeroyal/CPLD-Guide is ranked #521,455 (17th percentile) for total stargazers, and #363,984 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #481/610.

mikeroyal/CPLD-Guide is also tagged with popular topics, for these it's ranked: awesome (#2,746/3003), awesome-list (#2,734/2967), fpga (#449/507), resources (#440/487), hardware (#417/475), verilog (#267/305)

All Topics

cpld fpga awesome verilog circuits hardware resources logicgates awesome-list logic-circuit awesome-resource hardware-designs awesome-resources integrated-circuits

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Recent Commit History

1 commits on the default branch (main) since jan '22

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Languages

The only known language in this repository is Verilog

updated: 2025-03-07 @ 01:39am, id: 426018727 / R_kgDOGWSHpw