4 results found Sort:
- Filter by Primary Language:
- C (1)
- Julia (1)
- Verilog (1)
- +
Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.
Created
2023-04-01
76 commits to main branch, last one about a year ago
Fast, interactive Julia/GTK+ plots (+Smith charts +Gtk widget +Cairo-only images)
Created
2016-04-07
238 commits to master branch, last one 6 days ago
VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
Created
2021-08-05
114 commits to main branch, last one 3 years ago
A low noise nanovoltmeter design files and code
Created
2024-01-30
13 commits to main branch, last one 10 months ago