WangXuan95 / UH-JLS

FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless image compression. 一个超高性能的FPGA JPEG-LS编码器，用来进行无损图像压缩。

Date Created 2021-09-11 (2 years ago)

Commits 8 (last one 9 months ago)

Stargazers 81 (0 this week)

Watchers 4 (0 this week)

Forks 13

License gpl-3.0

Ranking

RepositoryStats indexes 534,880 repositories, of these WangXuan95/UH-JLS is ranked #313,383 (41st percentile) for total stargazers, and #354,941 for total watchers. Github reports the primary language for this repository as SystemVerilog, for repositories using this language it is ranked #77/154.

WangXuan95/UH-JLS is also tagged with popular topics, for these it's ranked: fpga (#273/435), verilog (#165/257)

Other Information

Homepage URL: https://gitee.com/wangxuan95/UH-JLS

All Topics

fpga jpeg-ls verilog image-encoder image-compression

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

7 commits on the default branch (main) since jan '22

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Issue History

Languages

The primary language is SystemVerilog but there's also others...

updated: 2024-07-01 @ 10:55am, id: 405408817 / R_kgDOGCoMMQ