alknvl / axis_udp

This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supported. The project was tested on Xilinx 7-series FPGA with 10G Ethernet MAC IP-core

Date Created 2022-03-15 (2 years ago)

Commits 3 (last one 2 years ago)

Stargazers 31 (2 this week)

Watchers 2 (0 this week)

Forks 21

License mit

Ranking

RepositoryStats indexes 534,880 repositories, of these alknvl/axis_udp is ranked #512,654 (4th percentile) for total stargazers, and #448,844 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #442/459.

alknvl/axis_udp is also tagged with popular topics, for these it's ranked: fpga (#429/435), verilog (#252/257)

All Topics

udp fpga verilog axi-stream

Star History

Github stargazers over time

Watcher History

Github watchers over time, collection started in '23

Recent Commit History

3 commits on the default branch (main) since jan '22

Yearly Commits

Commits to the default branch (main) per year

Issue History

No issues have been posted

Languages

The primary language is Verilog but there's also others...

updated: 2024-06-28 @ 10:17am, id: 470158975 / R_kgDOHAYOfw