esynr3z / corsair

Control and Status Register map generator for HDL projects

esynr3z
esynr3z
Date Created 2020-11-06 (4 years ago)
Commits 240 (last one about a year ago)
Stargazers 114 (1 this week)
Watchers 12 (0 this week)
Forks 37
License mit
Ranking

RepositoryStats indexes 632,869 repositories, of these esynr3z/corsair is ranked #280,736 (56th percentile) for total stargazers, and #173,314 for total watchers. Github reports the primary language for this repository as Python, for repositories using this language it is ranked #52,874/129,221.

esynr3z/corsair is also tagged with popular topics, for these it's ranked: python (#12,423/23427),  fpga (#245/515),  verilog (#150/308)

Other Information

esynr3z/corsair has 12 open pull requests on Github, 16 pull requests have been merged over the lifetime of the repository.

Github issues are enabled, there are 42 open issues and 14 closed issues.

Homepage URL: https://corsair.readthedocs.io

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

131312.512.5121211.511.5111110.510.510109.59.59920232023Jul '23Jul '2320242024Jul '24Jul '2420252025

Recent Commit History

27 commits on the default branch (master) since jan '22

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Yearly Commits

Commits to the default branch (master) per year

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Issue History

Total Issues
Open Issues
Closed Issues
60605050404030302020101000Jul '22Jul '2220232023Jul '23Jul '2320242024Jul '24Jul '2420252025

Languages

The primary language is Python but there's also others...

PythonPythonJinjaJinjaSystemVerilogSystemVerilog

updated: 2025-03-27 @ 10:02pm, id: 310674835 / R_kgDOEoSFkw