hsluoyz / Atalanta

Atalanta is a modified ATPG (Automatic Test Pattern Generation) tool and fault simulator, orginally from VirginiaTech University.

hsluoyz
hsluoyz
Date Created 2013-04-30 (11 years ago)
Commits 2 (last one 4 months ago)
Stargazers 74 (0 this week)
Watchers 8 (0 this week)
Forks 34
License unknown
Ranking

RepositoryStats indexes 565,279 repositories, of these hsluoyz/Atalanta is ranked #347,157 (39th percentile) for total stargazers, and #241,498 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #271/505.

hsluoyz/Atalanta is also tagged with popular topics, for these it's ranked: verilog (#186/272)

Other Information

hsluoyz/Atalanta has Github issues enabled, there are 8 open issues and 4 closed issues.

All Topics
atpg vlsi verilog atalanta

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1 commits on the default branch (master) since jan '22

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The primary language is Verilog but there's also others...

updated: 2024-09-13 @ 08:09am, id: 9771719 / R_kgDOAJUaxw