iammituraj / pequeno_riscv

Pequeno (PQR5) is a 5-stage pipelined in-order RISC-V CPU Core compliant with RV32I ISA.

iammituraj
iammituraj
Date Created 2023-12-08 (about a year ago)
Commits 42 (last one 3 days ago)
Stargazers 64 (0 this week)
Watchers 5 (0 this week)
Forks 7
License other
Ranking

RepositoryStats indexes 639,263 repositories, of these iammituraj/pequeno_riscv is ranked #419,098 (34th percentile) for total stargazers, and #325,936 for total watchers. Github reports the primary language for this repository as SystemVerilog, for repositories using this language it is ranked #121/199.

iammituraj/pequeno_riscv is also tagged with popular topics, for these it's ranked: fpga (#372/525),  cpu (#232/297),  risc-v (#192/285),  systemverilog (#65/102)

Other Information

There have been 2 releases, the latest one was published on 2024-10-04 (6 months ago) with the name v1.0_final.

Homepage URL: https://chipmunklogic.com

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

42 commits on the default branch (main) since jan '22

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Yearly Commits

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Issue History

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Languages

The primary language is SystemVerilog but there's also others...

SystemVerilogSystemVerilogPythonPythonAssemblyAssemblyShellShellMakefileMakefileTclTclStataStata
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iammituraj/pequeno_riscv

updated: 2025-04-15 @ 06:14am, id: 729319584 / R_kgDOK3iIoA