lauchinyuan / FPGA_QPSK-modem

A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA

Date Created 2023-04-15 (about a year ago)

Commits 45 (last one about a year ago)

Stargazers 110 (1 this week)

Watchers 3 (0 this week)

Forks 28

License unknown

Ranking

RepositoryStats indexes 595,856 repositories, of these lauchinyuan/FPGA_QPSK-modem is ranked #276,223 (54th percentile) for total stargazers, and #427,587 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #216/563.

lauchinyuan/FPGA_QPSK-modem is also tagged with popular topics, for these it's ranked: fpga (#240/488), matlab (#151/359), verilog (#145/289)

Other Information

lauchinyuan/FPGA_QPSK-modem has Github issues enabled, there are 2 open issues and 0 closed issues.

All Topics

fpga qpsk matlab vivado verilog

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

45 commits on the default branch (master) since jan '22

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Languages

The primary language is Verilog but there's also others...

updated: 2024-12-20 @ 07:08am, id: 628217542 / R_kgDOJXHWxg