OSVVM / AXI4

AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components

OSVVM
OSVVM
Date Created 2018-03-17 (7 years ago)
Commits 673 (last one about a month ago)
Stargazers 134 (0 this week)
Watchers 10 (0 this week)
Forks 19
License other
Ranking

RepositoryStats indexes 634,548 repositories, of these OSVVM/AXI4 is ranked #251,253 (60th percentile) for total stargazers, and #201,159 for total watchers. Github reports the primary language for this repository as VHDL, for repositories using this language it is ranked #61/201.

OSVVM/AXI4 is also tagged with popular topics, for these it's ranked: simulation (#454/1075)

Other Information

OSVVM/AXI4 has Github issues enabled, there are 8 open issues and 12 closed issues.

Star History

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Watcher History

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Recent Commit History

259 commits on the default branch (main) since jan '22

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Issue History

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Languages

The only known language in this repository is VHDL

VHDLVHDL

updated: 2025-03-27 @ 07:23pm, id: 125653139 / R_kgDOB31Qkw