phoeniX-Digital-Design / phoeniX

RISC-V Embedded Processor for Approximate Computing

Date Created 2023-08-12 (about a year ago)
Commits 1,532 (last one 3 months ago)
Stargazers 121 (-1 this week)
Watchers 5 (0 this week)
Forks 80
License gpl-3.0
Ranking

RepositoryStats indexes 612,937 repositories, of these phoeniX-Digital-Design/phoeniX is ranked #263,562 (57th percentile) for total stargazers, and #338,399 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #200/593.

phoeniX-Digital-Design/phoeniX is also tagged with popular topics, for these it's ranked: fpga (#226/498),  cpu (#167/296),  risc-v (#129/270),  embedded-systems (#117/213),  riscv (#93/173)

Other Information

There have been 5 releases, the latest one was published on 2024-08-05 (6 months ago) with the name phoeniX V0.4.1.

Star History

Github stargazers over time

140140120120100100808060604040202000Oct '23Oct '23Nov '23Nov '23Dec '23Dec '2320242024Feb '24Feb '24Mar '24Mar '24Apr '24Apr '24May '24May '24Jun '24Jun '24Jul '24Jul '24Aug '24Aug '24Sep '24Sep '24Oct '24Oct '24Nov '24Nov '24Dec '24Dec '2420252025Feb '25Feb '25

Watcher History

Github watchers over time, collection started in '23

554.54.5443.53.5332.52.522Feb '24Feb '24Mar '24Mar '24Apr '24Apr '24May '24May '24Jun '24Jun '24Jul '24Jul '24Aug '24Aug '24Sep '24Sep '24Oct '24Oct '24Nov '24Nov '24Dec '24Dec '2420252025Feb '25Feb '25

Recent Commit History

36 commits on the default branch (main) since jan '22

1.6k1.6k1.4k1.4k1.2k1.2k1k1k80080060060040040020020000Sep '23Sep '23Oct '23Oct '23Nov '23Nov '23Dec '23Dec '2320242024Feb '24Feb '24Mar '24Mar '24Apr '24Apr '24May '24May '24Jun '24Jun '24Jul '24Jul '24Aug '24Aug '24Sep '24Sep '24Oct '24Oct '24Nov '24Nov '24Dec '24Dec '2420252025Feb '25Feb '25

Yearly Commits

Commits to the default branch (main) per year

00-200-200-400-400-600-600-800-800-1000-1000-1200-1200-1400-140020242024

Issue History

Total Issues
Open Issues
Closed Issues
443.53.5332.52.5221.51.5110.50.500Jun '24Jun '24Jul '24Jul '24Aug '24Aug '24Sep '24Sep '24Oct '24Oct '24Nov '24Nov '24Dec '24Dec '2420252025Feb '25Feb '25

Languages

The primary language is Verilog but there's also others...

VerilogVerilogSystemVerilogSystemVerilogPythonPythonCCTclTclAssemblyAssemblyMakefileMakefileShellShell

updated: 2025-02-10 @ 02:15pm, id: 677643796 / R_kgDOKGQGFA