shehanmunasinghe / tinyGPU

tinyGPU: A Predicated-SIMD processor implementation in SystemVerilog

shehanmunasinghe
shehanmunasinghe
Date Created 2020-10-02 (4 years ago)
Commits 143 (last one 3 years ago)
Stargazers 45 (0 this week)
Watchers 4 (0 this week)
Forks 10
License unknown
Ranking

RepositoryStats indexes 638,560 repositories, of these shehanmunasinghe/tinyGPU is ranked #522,726 (18th percentile) for total stargazers, and #368,080 for total watchers. Github reports the primary language for this repository as SystemVerilog, for repositories using this language it is ranked #154/199.

shehanmunasinghe/tinyGPU is also tagged with popular topics, for these it's ranked: gpu (#876/972),  simd (#197/228),  systemverilog (#83/102)

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Github watchers over time, collection started in '23

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Recent Commit History

0 commits on the default branch (main) since jan '22

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Languages

The primary language is SystemVerilog but there's also others...

SystemVerilogSystemVerilogPythonPython

updated: 2025-04-09 @ 12:40pm, id: 300596733 / R_kgDOEeq9_Q