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134

394

other

23

The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core

ara cpu rvv asic riscv vector rv64gcv

Created 2021-03-05

1,771 commits to main branch, last one 10 days ago

rvv-bench camel-cdr

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97

mit

4

A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code

rvv risc-v benchmark

Created 2023-07-28

84 commits to main branch, last one 22 days ago

saturn-vectors ucb-bar

8

74

bsd-3-clause

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Chisel RISC-V Vector 1.0 Implementation

cpu rvv chisel risc-v vectors microarchitecture

Created 2023-08-23

911 commits to master branch, last one about a month ago

riscv-vector-tests chipsalliance

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73

apache-2.0

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Unit tests generator for RVV 1.0

rvv riscv spike generator testsuite

Created 2022-11-03

262 commits to main branch, last one about a month ago

intrinsics-viewer dzaima

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40

mit

3

x86-64, ARM, and RVV intrinsics viewer

avx rvv sve avx2 neon avx512 risc-v x86-64 simd-intrinsics

Created 2022-12-10

210 commits to master branch, last one about a month ago

neon2rvv howjmay

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28

mit

1

A translator from ARM NEON intrinsics to RISCV-V Extension implementation

arm rvv neon simd arm64 armv7 armv8 riscv aarch64 armv8-a riscv64 sse2neon intrinsics apple-silicon

Created 2023-01-15

1,027 commits to main branch, last one 5 months ago

rvv-bench-results camel-cdr

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27

unknown

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A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code. (Results)

rvv risc-v benchmark

Created 2023-07-28

65 commits to main branch, last one about a month ago