Akashtailor-exe / 30-days-of-verilog

30 Days of Verilog: Dive into digital circuits with a month of Verilog coding challenges. From logic gates to FSMs, sharpen your skills and simulate your designs. Let's code and conquer circuits!

Date Created 2023-08-30 (about a year ago)

Commits 48 (last one about a year ago)

Stargazers 29 (0 this week)

Watchers 1 (0 this week)

Forks 4

License unknown

Ranking

RepositoryStats indexes 595,856 repositories, of these Akashtailor-exe/30-days-of-verilog is ranked #574,441 (4th percentile) for total stargazers, and #544,643 for total watchers.

Akashtailor-exe/30-days-of-verilog is also tagged with popular topics, for these it's ranked: verilog (#284/289)

All Topics

vlsi verilog rtl-coding rtl-design 30daysofcode digitalcircuit 30-days-of-code verilog-project verilog-programs digital-logic-design

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Recent Commit History

48 commits on the default branch (main) since jan '22

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updated: 2024-12-17 @ 07:10pm, id: 685213743 / R_kgDOKNeILw