7 results found Sort:

4xmen
Web-Package-RTL 4xmen
201
635
agpl-3.0
7
⚡ Full RTL Package - Bootstrap Responsive Components For Iranian's 🇮🇷
css rtl html sass 4xmen xstack persian components rtl-design rtl-package web-package full-package right-to-left rtl-component persian-template components-and-templates
Created 2023-03-06
87 commits to main branch, last one 2 months ago
pulp-platform
cheshire pulp-platform
50
206
other
15
A minimal Linux-capable 64-bit RISC-V SoC built around CVA6
asic fpga riscv rtl-design simulation systemverilog
Created 2022-09-01
104 commits to main branch, last one 16 days ago
4xmen
x-mega-menu 4xmen
46
171
gpl-3.0
3
x mega menu is repsonsive mega menu based on vannilajs
menu scss 4xmen navbar xstack rtl-menu mega-menu javascript navigation rtl-design vannila-js
Created 2023-02-08
47 commits to main branch, last one 4 months ago
4xmen
x-tree-select 4xmen
27
101
gpl-3.0
5
Tree Select jQuery plugin
javascript rtl-design
Created 2019-01-25
111 commits to master branch, last one 6 months ago
4xmen
rvnm 4xmen
8
65
gpl-3.0
7
Responsive vertical navigation menu
rtl menu 4xmen navbar xstack wordpress javascript rtl-design multi-theme right-to-left wordpress-menu responsive-menu responsive-navbar wordpress-navigation
Created 2017-12-07
76 commits to master branch, last one 2 years ago
pulp-platform
croc pulp-platform
6
40
other
6
A PULP SoC for education, easy to understand and extend with a full flow for a physical design.
asic riscv rtl-design systemverilog
Created 2024-07-18
84 commits to main branch, last one 17 days ago
Akashtailor-exe
30-days-of-verilog Akashtailor-exe
4
29
unknown
1
30 Days of Verilog: Dive into digital circuits with a month of Verilog coding challenges. From logic gates to FSMs, sharpen your skills and simulate your designs. Let's code and conquer circuits!
vlsi verilog rtl-coding rtl-design 30daysofcode digitalcircuit 30-days-of-code verilog-project verilog-programs digital-logic-design
Created 2023-08-30
48 commits to main branch, last one about a year ago