chili-chips-ba / openCologne

Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples => https://www.chili-chips.xyz/open-cologne | Also see https://nanoxplore.com

Date Created 2024-05-09 (10 months ago)

Commits 579 (last one 2 days ago)

Stargazers 61 (0 this week)

Watchers 20 (0 this week)

Forks 7

License bsd-3-clause

Ranking

RepositoryStats indexes 632,768 repositories, of these chili-chips-ba/openCologne is ranked #430,099 (32nd percentile) for total stargazers, and #108,526 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #365/618.

chili-chips-ba/openCologne is also tagged with popular topics, for these it's ranked: embedded (#557/704), design (#550/699), fpga (#378/515), risc-v (#196/282), hls (#218/260), pcb (#155/252)

Other Information

chili-chips-ba/openCologne has Github issues enabled, there are 33 open issues and 34 closed issues.

Homepage URL: https://nlnet.nl/project/openCologne

All Topics

hls pcb rtl soc fpga design risc-v digital embedded gatemate colognechip systemverilog

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Recent Commit History

579 commits on the default branch (main) since jan '22

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Languages

The primary language is Verilog but there's also others...

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updated: 2025-03-27 @ 10:10pm, id: 798146281 / R_kgDOL5K-6Q