Nic30 / hdlConvertor

Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4

Date Created 2016-06-28 (8 years ago)

Commits 1,768 (last one 8 months ago)

Stargazers 281 (0 this week)

Watchers 22 (0 this week)

Forks 66

License mit

Ranking

RepositoryStats indexes 566,921 repositories, of these Nic30/hdlConvertor is ranked #136,982 (76th percentile) for total stargazers, and #99,882 for total watchers. Github reports the primary language for this repository as C++, for repositories using this language it is ranked #7,713/30,367.

Nic30/hdlConvertor is also tagged with popular topics, for these it's ranked: python (#6,734/21466), parser (#350/1173), fpga (#113/462), verilog (#77/272)

Other Information

Nic30/hdlConvertor has 3 open pull requests on Github, 52 pull requests have been merged over the lifetime of the repository.

Github issues are enabled, there are 31 open issues and 103 closed issues.

All Topics

fpga vhdl antrl4 parser python verilog vhdl-parser systemverilog verilog-parser systemverilog-parser

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Recent Commit History

42 commits on the default branch (master) since jan '22

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The primary language is C++ but there's also others...

updated: 2024-09-24 @ 02:12am, id: 62142405 / R_kgDOA7Q3xQ