proteus-core / proteus

The SpinalHDL design of the Proteus core, an extensible RISC-V core.

Date Created 2022-12-30 (about a year ago)

Commits 430 (last one 12 days ago)

Stargazers 43 (0 this week)

Watchers 2 (0 this week)

Forks 10

License mit

Ranking

RepositoryStats indexes 589,134 repositories, of these proteus-core/proteus is ranked #500,913 (15th percentile) for total stargazers, and #481,361 for total watchers. Github reports the primary language for this repository as Scala, for repositories using this language it is ranked #1,851/1,989.

proteus-core/proteus is also tagged with popular topics, for these it's ranked: security (#3,692/4038), research (#455/503), fpga (#432/482), hardware (#401/447), cpu (#267/285), verilog (#258/284), risc-v (#230/265), riscv (#145/167)

Other Information

There have been 4 releases, the latest one was published on 2024-04-12 (7 months ago) with the name 24.01.

All Topics

cpu rtl fpga riscv risc-v verilog hardware research security spinalhdl

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

76 commits on the default branch (main) since jan '22

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Issue History

Languages

The primary language is Scala but there's also others...

updated: 2024-11-24 @ 04:27am, id: 583519868 / R_kgDOIsfOfA