proteus-core / proteus

The SpinalHDL design of the Proteus core, an extensible RISC-V core.

Date Created 2022-12-30 (2 years ago)

Commits 436 (last one 6 days ago)

Stargazers 43 (0 this week)

Watchers 2 (0 this week)

Forks 10

License mit

Ranking

RepositoryStats indexes 602,239 repositories, of these proteus-core/proteus is ranked #509,529 (15th percentile) for total stargazers, and #489,072 for total watchers. Github reports the primary language for this repository as Scala, for repositories using this language it is ranked #1,861/2,002.

proteus-core/proteus is also tagged with popular topics, for these it's ranked: security (#3,733/4093), research (#464/513), fpga (#437/493), hardware (#404/457), verilog (#259/294), cpu (#271/290), risc-v (#234/271), riscv (#145/170)

Other Information

There have been 4 releases, the latest one was published on 2024-04-12 (9 months ago) with the name 24.01.

All Topics

cpu rtl fpga riscv risc-v verilog hardware research security spinalhdl

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Watcher History

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Recent Commit History

82 commits on the default branch (main) since jan '22

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Issue History

Languages

The primary language is Scala but there's also others...

updated: 2025-01-03 @ 04:38am, id: 583519868 / R_kgDOIsfOfA