thedatabusdotio / fpga-ml-accelerator

This repository hosts the code for an FPGA based accelerator for convolutional neural networks

Date Created 2020-07-17 (4 years ago)

Commits 7 (last one 9 months ago)

Stargazers 144 (0 this week)

Watchers 3 (0 this week)

Forks 28

License unknown

Ranking

RepositoryStats indexes 631,351 repositories, of these thedatabusdotio/fpga-ml-accelerator is ranked #237,769 (62nd percentile) for total stargazers, and #417,031 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #172/617.

thedatabusdotio/fpga-ml-accelerator is also tagged with popular topics, for these it's ranked: fpga (#206/515), hardware (#212/475)

Other Information

thedatabusdotio/fpga-ml-accelerator has Github issues enabled, there are 4 open issues and 0 closed issues.

Homepage URL: https://thedatabus.io

All Topics

asic fpga vhdl hardware verilog-hdl verification digital-design

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2 commits on the default branch (master) since jan '22

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Languages

The only known language in this repository is Verilog

updated: 2025-03-19 @ 05:36pm, id: 280407843 / R_kgDOELavIw