2 results found Sort:

kiabuzz
CompressedLUT kiabuzz
2
27
other
3
A tool to generate optimized hardware files for univariate functions.
hls rtl hardware-ip lookup-table ip-generation function-evaluation lossless-compression table-size-reduction hardware-acceleration function-implementation table-based-function-implementation
Created 2023-12-26
27 commits to main branch, last one 12 months ago
ollycassidy13
ReducedLUT ollycassidy13
1
25
other
1
A tool for compression of lookup tables and generation of their hardware files in Verilog for RTL designs
rtl fpga verilog compression hardware-ip lookup-table ip-generation neural-network rtl-generation table-size-reduction hardware-acceleration
Created 2024-10-17
11 commits to main branch, last one 2 days ago