WangXuan95 / FPGA-SHA-Family

Verilog implementation of SHA1/SHA224/SHA256/SHA384/SHA512. 使用Verilog实现的SHA1/SHA224/SHA256/SHA384/SHA512计算器。

WangXuan95
WangXuan95
Date Created 2020-09-01 (4 years ago)
Commits 11 (last one about a year ago)
Stargazers 67 (0 this week)
Watchers 4 (0 this week)
Forks 17
License gpl-3.0
Ranking

RepositoryStats indexes 632,869 repositories, of these WangXuan95/FPGA-SHA-Family is ranked #403,641 (36th percentile) for total stargazers, and #366,084 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #338/622.

WangXuan95/FPGA-SHA-Family is also tagged with popular topics, for these it's ranked: fpga (#358/515),  verilog (#216/308)

Other Information

Homepage URL: https://gitee.com/wangxuan95/FPGA-SHA-Family

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

8 commits on the default branch (master) since jan '22

887766554433221100Jul '22Jul '2220232023Jul '23Jul '2320242024Jul '24Jul '2420252025

Yearly Commits

Commits to the default branch (master) per year

554.54.5443.53.5332.52.5221.51.5110.50.50020202020202120212022202220242024

Issue History

No issues have been posted

Languages

The primary language is Verilog but there's also others...

VerilogVerilogBatchfileBatchfile

updated: 2025-03-11 @ 11:08am, id: 292003322 / R_kgDOEWed-g