ZipCPU / dpll

A collection of phase locked loop (PLL) related projects

Date Created 2017-12-04 (6 years ago)

Commits 26 (last one 5 months ago)

Stargazers 92 (0 this week)

Watchers 10 (0 this week)

Forks 26

License unknown

Ranking

RepositoryStats indexes 535,551 repositories, of these ZipCPU/dpll is ranked #288,092 (46th percentile) for total stargazers, and #199,843 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #221/461.

ZipCPU/dpll is also tagged with popular topics, for these it's ranked: fpga (#247/435), verilog (#149/257)

All Topics

pll fpga gplv3 verilog verilator

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

1 commits on the default branch (master) since jan '22

Yearly Commits

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Issue History

Languages

The primary language is Verilog but there's also others...

updated: 2024-07-02 @ 01:28pm, id: 113078990 / R_kgDOBr1yzg