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eugene-tarassov
vivado-risc-v eugene-tarassov
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Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
boom fpga kc705 linux riscv vc707 risc-v vivado xilinx arty-a7 genesys2 rocketchip nexys-video
Created 2020-02-15
428 commits to master branch, last one 12 days ago