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lakshmi-sathi
avsdpll_1v8 lakshmi-sathi
41
109
gpl-2.0
13
8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x multiplied clock at ~50% duty cycle on tt corner at room temperat...
ic pll asic rtl2gds charge-pump analog-circuit manufacturable phase-detector clock-multiplier intellectual-property
Created 2020-10-28
384 commits to main branch, last one 3 years ago