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alanjian85
raster-i alanjian85
7
203
mit
3
A 3D FPGA GPU for real-time rasterization with a tile-based deferred rendering (TBDR) architecture, featuring transform & lighting (T&L), back-face culling, MSAA anti-aliasing, ordered dithering, etc.
gpu fpga chisel vitis-hls rasterizer tiled-deferred
Created 2023-01-24
231 commits to main branch, last one 9 days ago