abdelazeem201 / Systolic-array-implementation-in-RTL-for-TPU

IC implementation of Systolic Array for TPU

Date Created 2021-01-07 (4 years ago)
Commits 67 (last one 4 months ago)
Stargazers 188 (2 this week)
Watchers 3 (0 this week)
Forks 27
License mit
Ranking

RepositoryStats indexes 618,350 repositories, of these abdelazeem201/Systolic-array-implementation-in-RTL-for-TPU is ranked #193,004 (69th percentile) for total stargazers, and #434,053 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #125/601.

abdelazeem201/Systolic-array-implementation-in-RTL-for-TPU is also tagged with popular topics, for these it's ranked: fpga (#162/503),  verilog (#103/299)

Star History

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

27 commits on the default branch (main) since jan '22

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Issue History

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Languages

The primary language is Verilog but there's also others...

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updated: 2025-02-22 @ 04:32am, id: 327681879 / R_kgDOE4gHVw