Nic30 / hwt

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

Date Created 2015-05-19 (9 years ago)

Commits 3,321 (last one 24 days ago)

Stargazers 194 (0 this week)

Watchers 18 (0 this week)

Forks 26

License mit

Ranking

RepositoryStats indexes 534,880 repositories, of these Nic30/hwt is ranked #172,088 (68th percentile) for total stargazers, and #119,825 for total watchers. Github reports the primary language for this repository as Python, for repositories using this language it is ranked #29,806/103,597.

Nic30/hwt is also tagged with popular topics, for these it's ranked: compiler (#473/987), fpga (#137/435), simulator (#111/311), verilog (#90/257), hls (#116/231)

Other Information

Nic30/hwt has Github issues enabled, there are 10 open issues and 32 closed issues.

All Topics

hcl hls rtl uvm fpga vhdl codegen systemc verilog compiler simulator codegenerator systemverilog

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Recent Commit History

134 commits on the default branch (master) since jan '22

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Languages

The only known language in this repository is Python

updated: 2024-06-22 @ 11:00am, id: 35898469 / R_kgDOAiPEZQ