panda5mt / KyogenRV

The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.

panda5mt
panda5mt
Date Created 2020-04-08 (5 years ago)
Commits 740 (last one 4 years ago)
Stargazers 45 (0 this week)
Watchers 2 (0 this week)
Forks 5
License apache-2.0
Ranking

RepositoryStats indexes 640,560 repositories, of these panda5mt/KyogenRV is ranked #523,278 (18th percentile) for total stargazers, and #485,708 for total watchers. Github reports the primary language for this repository as Scala, for repositories using this language it is ranked #1,861/2,043.

panda5mt/KyogenRV is also tagged with popular topics, for these it's ranked: fpga (#458/526),  risc-v (#242/286),  riscv (#156/181)

Star History

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

0 commits on the default branch (master) since jan '22

Inactive

No recent commits to this repository

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Issue History

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Languages

The primary language is Scala but there's also others...

ScalaScalaSystemVerilogSystemVerilogTclTclPythonPythonAssemblyAssemblyMakefileMakefileShellShell

updated: 2025-04-03 @ 08:05am, id: 254105445 / R_kgDODyVXZQ