9 results found Sort:

599
4.0k
apache-2.0
150
Chisel: A Modern Hardware Design Language
Created 2015-04-27
6,172 commits to main branch, last one 20 hours ago
12
143
apache-2.0
3
An exquisite superscalar RV32GC processor.
Created 2023-12-24
61 commits to main branch, last one 6 months ago
20
115
apache-2.0
17
Provides dot visualizations of chisel/firrtl circuits
Created 2018-10-31
115 commits to master branch, last one 2 years ago
:deciduous_tree: The next generation integrated development environment for processor design and verification. It has multi-hardware language support, open source IP management and easy-to-use rtl si...
Created 2021-04-30
262 commits to main branch, last one 2 years ago
13
84
apache-2.0
3
Yet another toy CPU.
Created 2021-12-14
248 commits to main branch, last one about a year ago
20
79
unknown
5
Lectures for the Agile Hardware Design course in Jupyter Notebooks
Created 2021-03-30
221 commits to main branch, last one 8 months ago
Learning how to make RISC-V 32bit CPU with Chisel
Created 2021-08-22
67 commits to main branch, last one 3 years ago
11
49
cc-by-sa-4.0
2
Documentation for YatCPU
Created 2021-12-20
186 commits to master branch, last one about a year ago
5
44
apache-2.0
3
The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.
Created 2020-04-08
740 commits to master branch, last one 3 years ago