ZipCPU / wbuart32

A simple, basic, formally verified UART controller

Date Created 2016-09-21 (8 years ago)

Commits 160 (last one 9 months ago)

Stargazers 282 (0 this week)

Watchers 16 (0 this week)

Forks 48

License gpl-3.0

Ranking

RepositoryStats indexes 585,332 repositories, of these ZipCPU/wbuart32 is ranked #139,453 (76th percentile) for total stargazers, and #137,203 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #80/535.

ZipCPU/wbuart32 is also tagged with popular topics, for these it's ranked: fpga (#115/478), verilog (#78/282)

All Topics

fpga uart verilog wishbone verilator serialport uart-verilog wishbone-bus

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

12 commits on the default branch (master) since jan '22

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Issue History

Languages

The primary language is Verilog but there's also others...

updated: 2024-11-06 @ 08:50pm, id: 68826276 / R_kgDOBBo0pA