3 results found Sort:

pConst
basic_verilog pConst
379
1.6k
unknown
60
Must-have verilog systemverilog modules
hls pwm tcl fifo fpga uart delay altera xilinx encoder uart-tx verilog debounce spi-master synchronizer uart-verilog spi-interface uart-protocol uart-receiver uart-controller
Created 2015-12-14
261 commits to master branch, last one 4 months ago
ZipCPU
wbuart32 ZipCPU
48
282
gpl-3.0
16
A simple, basic, formally verified UART controller
fpga uart verilog wishbone verilator serialport uart-verilog wishbone-bus
Created 2016-09-21
160 commits to master branch, last one 9 months ago
ben-marshall
uart ben-marshall
21
100
mit
4
A simple implementation of a UART modem in Verilog.
fpga uart verilog hardware verilog-hdl uart-verilog
Created 2017-02-04
50 commits to master branch, last one 2 years ago