Search Results - RepositoryStats

30

139

apache-2.0

11

A complete open-source design-for-testing (DFT) Solution

dft eda atpg jtag testing verilog stuck-at vlsi-cad scan-chains verilog-hdl fault-simulation

Created 2019-06-08

214 commits to main branch, last one about a month ago

13

119

bsd-3-clause

7

🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit

fpga vlsi-cad

Created 2023-04-21

28 commits to master branch, last one about a month ago

23

101

gpl-2.0

16

ACT hardware description language and core tools.

cad chp eda hdl prs vlsi dataflow language vlsi-cad production-rules asynchronous-vlsi circuit-simulator design-automation dataflow-programming asynchronous-circuits hardware-description-language communicating-hardware-processes

Created 2018-12-10

1,968 commits to master branch, last one 4 days ago

8

41

unknown

2

Courseworks of CS6165 VLSI Physical Design Automation, NTHU.

eda nthu vlsi vlsi-cad vlsi-design vlsi-routing fixed-outline global-routing vlsi-floorplan vlsi-placement two-way-min-cut global-placement vlsi-physical-design physical-design-automation

Created 2020-11-05

29 commits to master branch, last one 3 years ago