5 results found Sort:

nturley
netlistsvg nturley
75
600
mit
24
draws an SVG schematic from a JSON netlist
elk yosys klayjs diagram netlist visualization
Created 2016-11-30
245 commits to master branch, last one 5 months ago
emsec
hal emsec
72
524
mit
24
HAL – The Hardware Analyzer
hal fpga netlist hardware security embedded-security integrated-circuits reverse-engineering
Created 2019-02-04
4,896 commits to master branch, last one 2 days ago
circuitgraph
circuitgraph circuitgraph
14
99
mit
3
Tools for working with circuits as graphs in python
eda graphs python netlist satisfiability boolean-circuits
Created 2020-07-12
253 commits to main branch, last one about a year ago
byuccl
spydrnet byuccl
19
86
bsd-3-clause
14
A flexible framework for analyzing and transforming FPGA netlists. Official repository.
cad eda edif fpga fpgas circuit digital netlist circuits hardware netlists circuit-design netlist-parser transformation transformations circuit-analysis hardware-designs computer-aided-design electronic-design-automation
Created 2019-09-23
875 commits to master branch, last one 9 months ago
najaeda
naja najaeda
9
48
apache-2.0
9
Structural Netlist API (and more) for EDA post synthesis flow development
cpp eda asic fpga netlist verilog semiconductor
Created 2021-10-08
725 commits to main branch, last one 6 days ago