4 results found Sort:
- Filter by Primary Language:
- Julia (2)
- Python (1)
- Verilog (1)
- +
A High-performance Timing Analysis Tool for VLSI Systems
Created
2015-07-14
216 commits to master branch, last one about a year ago
Algorithms from circuit theory to predict connectivity in heterogeneous landscapes
Created
2017-02-01
828 commits to master branch, last one 2 months ago
A flexible framework for analyzing and transforming FPGA netlists. Official repository.
Created
2019-09-23
875 commits to master branch, last one 9 months ago
Functions to compute omnidirectional landscape connectivity using circuit theory and the Omniscape algorithm.
Created
2019-06-29
1,012 commits to main branch, last one 4 months ago