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A High-performance Timing Analysis Tool for VLSI Systems

cad eda sta vlsi cpp17 verilog vlsi-circuits circuit-analysis circuit-simulator circuit-simulation parallel-computing vlsi-physical-design computer-aided-design static-timing-analysis electronic-design-automation

Created 2015-07-14

216 commits to master branch, last one about a year ago

35

125

mit

7

Algorithms from circuit theory to predict connectivity in heterogeneous landscapes

julia forest-fire epidemiology climate-change julia-language animal-movement circuit-analysis movement-ecology landscape-ecology landscape-genetics sparse-linear-systems

Created 2017-02-01

828 commits to master branch, last one 2 months ago

19

86

bsd-3-clause

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A flexible framework for analyzing and transforming FPGA netlists. Official repository.

cad eda edif fpga fpgas circuit digital netlist circuits hardware netlists circuit-design netlist-parser transformation transformations circuit-analysis hardware-designs computer-aided-design electronic-design-automation

Created 2019-09-23

875 commits to master branch, last one 9 months ago

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55

mit

5

Functions to compute omnidirectional landscape connectivity using circuit theory and the Omniscape algorithm.

ecology circuitscape connectivity julia-package circuit-theory climate-change julia-language animal-movement circuit-analysis landscape-ecology

Created 2019-06-29

1,012 commits to main branch, last one 4 months ago