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48
A High-performance Timing Analysis Tool for VLSI Systems
Created 2015-07-14
216 commits to master branch, last one 2 years ago
33
137
apache-2.0
14
Standard Cell Library based Memory Compiler using FF/Latch cells
Created 2020-11-09
281 commits to main branch, last one 11 months ago
19
117
gpl-2.0
10
GDSII File Parsing, IC Layout Analysis, and Parameter Extraction
Created 2018-10-05
233 commits to master branch, last one about a year ago
A Standalone Structural Verilog Parser
Created 2019-01-04
67 commits to master branch, last one 3 years ago
Library of approximate arithmetic circuits
Created 2018-12-20
56 commits to master branch, last one 2 years ago
A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
Created 2018-08-08
215 commits to master branch, last one 2 years ago