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365

1.2k

apache-2.0

58

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

rtl asic vlsi 130nm magic yosys netgen caravel foundry klayout openram rtl2gds verilog openroad skywater soc-design system-on-chip

Created 2020-07-20

1,879 commits to master branch, last one 3 days ago

open-source-pdks google

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apache-2.0

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Index of the fully open source process design kits (PDKs) maintained by Google.

eda pdk asic 130nm 180nm sky130 silicon gf180mcu openroad skywater globalfoundries

Created 2022-07-20

22 commits to main branch, last one about a year ago

skywater-pdk-libs-sky130_fd_pr_reram google

12

36

apache-2.0

15

SKY130 ReRAM and examples (SkyWater Provided)

eda pdk asic xyce 130nm reram ngspice silicon openroad skywater

Created 2021-09-28

27 commits to main branch, last one 2 years ago