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OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
Created
2020-07-20
1,892 commits to master branch, last one 2 months ago
KLayout Main Sources
Created
2017-02-12
6,782 commits to master branch, last one 3 days ago
python library to design chips (Photonics, Analog, Quantum, MEMs, ...), objects for 3D printing or PCBs.
Created
2020-03-26
13,087 commits to main branch, last one a day ago
SiEPIC EBeam PDK & Library, for SiEPIC-Tools and KLayout
Created
2015-11-14
2,022 commits to master branch, last one about a month ago
KLayout Python library for integrated quantum circuit design.
Created
2020-08-10
1,063 commits to main branch, last one 24 days ago
This repository has no description...
Created
2022-07-28
11 commits to main branch, last one about a year ago
gdsfactory plugins
Created
2023-08-01
1,339 commits to main branch, last one a day ago