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379
1.4k
apache-2.0
61
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
Created 2020-07-20
1,893 commits to master branch, last one 3 days ago
69
300
apache-2.0
21
Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.
Created 2021-10-07
1,607 commits to main branch, last one about a month ago
136
135
apache-2.0
17
Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
Created 2020-11-12
1,100 commits to master branch, last one 3 years ago