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Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.
Created
2021-10-07
1,607 commits to main branch, last one about a month ago
The next generation of OpenLane, rewritten from scratch with a modular architecture
Created
2023-01-16
406 commits to main branch, last one 12 days ago
Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
Created
2020-11-12
1,100 commits to master branch, last one 3 years ago
Index of the fully open source process design kits (PDKs) maintained by Google.
Created
2022-07-20
22 commits to main branch, last one 2 years ago
Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
Created
2021-02-06
57 commits to main branch, last one 3 years ago
JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.
Created
2021-12-26
152 commits to main branch, last one about a month ago
Raw data collected about the SKY130 process technology.
Created
2022-07-21
29 commits to main branch, last one about a year ago
Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
Created
2022-08-04
150 commits to main branch, last one 2 years ago
A simple MOSFET model with only 5-DC-parameters for circuit simulation
Created
2023-07-25
180 commits to main branch, last one 6 months ago
This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK
Created
2021-01-22
71 commits to main branch, last one 2 years ago
This repo contains the code that runs RL+GNN to optimize LDOs in SKY130 process.
Created
2023-05-10
29 commits to main branch, last one 6 months ago
Flip flop setup, hold & metastability explorer tool
Created
2022-01-14
64 commits to main branch, last one 2 years ago