3 results found Sort:

chipsalliance
Surelog chipsalliance
68
381
apache-2.0
27
SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
uvm vpi antlr linter parser verilog vpi-api parser-ast python-api elaboration preprocessor vpi-standard systemverilog antlr4-grammar
Created 2019-10-30
6,622 commits to master branch, last one about a month ago
wyvernSemi
vproc wyvernSemi
9
51
gpl-3.0
9
Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments
c cpp dpi pli vpi fpga vhdl dpi-c logic python verilog codesign processor vhpidirect cosimulation verification systemverilog logic-simulation asic-verification simulation-element
Created 2016-09-29
262 commits to master branch, last one about a month ago
dbhi
vboard dbhi
6
40
unknown
6
Virtual development board for HDL design
fli hdl vpi ghdl vhdl cosim verilog verilator vhpidirect
Created 2020-04-30
47 commits to main branch, last one about a year ago