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366

1.5k

gpl-3.0

73

simavr is a lean, mean and hackable AVR simulator for linux & OSX

c simavr avr-gcc gtkwave debugger embedded avr-simulator

Created 2012-05-14

1,148 commits to master branch, last one 2 months ago

12

106

mit

7

VCD file (Value Change Dump) command line viewer

cli vcd vhdl gtkwave

Created 2014-11-22

30 commits to master branch, last one about a year ago

15

64

mit

3

SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!

tdd vcd flow foss svut python gtkwave verilog testcase simulator verilator simulation mit-license systemverilog tdd-utilities icarus-verilog verification-methodologies

Created 2017-03-12

179 commits to master branch, last one 2 days ago